Technology Files and Technology Libraries
NCSU provides a set of tech files for the SCMOS design rules provided by MOSIS. These were originally based on a set published by MIT but have been heavily expanded and updated for 4.4. The tech files define layer names, DRC and extraction rules and various other things.
For each process, the CDK includes a "technology library" against which design libraries can be linked. These technology libraries contain all the information held in the technology files and so eliminate the need for the design library to duplicate this information. The technology libraries are named "NCSU_TechLib_xxxYY", where "xxx" is an abbreviation of the foundry name, and "YY" is the minimum device length in microns, e.g., NCSU_TechLib_ami16 is for the AMI 1.6um process. Another string may optionally be appended to the library name if necessary, e.g. NCSU_TechLib_tsmc04_3M2P, where the _3M2P marks this as the three-metal, two-poly variant of the TSMC 0.4um (drawn) process.
The technology files which contain the "controls" class for each process are stored in the $cdk_dir/techfile directory. The files are named according to the template "vendor_Ldmin.tf". The current list of active process techfile stubs is:
ami_06.tf ami_16.tf hp_04.tf hp_06.tf tsmc_02.tf tsmc_03.tf tsmc_04_4m.tf tsmc_04_4m2p.tf
(Note that the TSMC 0.4um process has two distinct variants, because different mask layers are available depending on which variant is used.)
Note for 0.99.X users: The old technology library names, e.g., hp14_TechLib, have been kept for backward compatibility with existing designs. All files from the current technology library are linked to the old library. For example, in the directory hp14_TechLib are symbolic links to all files in the (current) directory NCSU_TechLib_hp06. This way, any design that references an instance from hp14_TechLib will still find it, even though the reference points (via the link) to NCSU_TechLib_hp06. In case you're wondering why we didn't simply make hp14_TechLib a link to NCSU_TechLib_hp06 itself, that would confuse the Library Manager, since there would be two libraries pointing to the same directory.
The control class defines the parameters "lambda" and "technology" for each process. Additionally, it defines the following parameters on a process-by-process basis:
- elecAvailable - if elec (poly2) is available
- npnAvailable - if pbase (for NPNs) is available
- ccdAvailable - if ccd is available
- metal3Available - if metal 3 is available
- metal4Available - if metal 4 is available
- metal5Available - if metal 5 is available
- metal6Available - if metal 6 is available
- metalcapAvailable - if metalcap is available
- cwellAvailable - if linear thin-ox capacitors are available
- polyCapAvailable - if second poly for capacitors is available
- memsAvailable - if MEMS layers are available
- sblockAvailable - if silicide block (for poly resistors) is available
- highresAvailable - if high resistance poly2 implant is available
- hvAvailable - if thick active (for high-voltage transistors) is available
The technology files use these parameters to include rules for these optional layers only if they are available. This avoids the temptation for designers to attempt to place layers in their designs when that layer is not available for the given process.
The remaining tech files are loaded by the Create Library form.
Adding Support for a New Technology
Each process needs its own technology library against which users can link their design libraries. To create a new technology library for a new process:
- Create the master technology file (.tf file) with the appropriate techParams in the $cdk_dir/techfile directory. The name of the file needs to be the same as the ?techFile parameter in the NCSU_techData entry (see step 8) and should be constructed in accordance with the instructions above.
- If new layers were created that need new symbolics (such as metal layers that need symbolic contacts for path stitching), edit $cdk_dir/techfile/devices.tf to create the new symbolics. Then add their names to the list at the top of $cdk_dir/skill/menus/ciw/createLib.il
- Add entries in $cdk_dir/cdssetup/display.drf for any new layers.
- Add the new technology library name to the list in $cdk_dir/skill/pcells/redoPcells.il.
- Add appropriate parasitic capacitances to the list in $cdk_dir/techfile/layerDefinitions.tf
- If the new technology has a combination of optional layers that is not already present in an existing technology:
- add the appropriate geomConnect() section to divaLayerDef.il, in the $cdk_dir/techfile directory
- create a new layerDefn.XX.YY file in $cdk_dir/techfile defining the appropriate layers as techLayerPurposePriorities pairs. Be sure to list the layers in the order in which they should appear in the LSW. add a line to load the new layerDefn.XX.YY file in layerDefinitions.tf
- Update the table showing which processes have which optional layers in $cdk_dir/doc/layerInfo.html.
- In $cdk_dir/skill/globalData.il, create an entry in the NCSU_techData table and fill in the appropriate values. Note that after this step, the technology choice will be visible in the "Create Library" dialog box, so make sure everything is done at this point.
- Using the "File->Library->New..." menu item, create the technology library in the directory $cdk_dir/lib (Be sure to choose the "Compile Tech File" option!)
Adding New Layers to the CDK
This list of "things to do" is geared toward new interconnect layers. If you add a new "device" layer, you may need to alter other files. (Note that you may have already done some of these things if you're adding a new process.)
- Add display characteristics for the new layer to $cdk_dir/cdssetup/display.drf.
- Document your new layer in $cdk_dir/doc/layerInfo.html
- Update $cdk_dir/pipo/cifInLayermap, $cdk_dir/pipo/cifOutLayermap and $cdk_dir/pipo/streamInLayermap to include translations for the new layer.
- If you don't want the new layer to be highlighted when you click on a net in the extracted view (e.g. via), go to $cdk_dir/skill/globalData.il and add it to NCSU_hiliteExcludeList, e.g.
NCSU_hiliteExcludeList[ "via5" ] = t
- If there will be a new pcell, add the correct code to $cdk_dir/skill/pcells/utility.il. (There's lots of insertions to be made here, so I'm not going to list them all.) Create the new pcell SKILL code in $cdk_dir/skill/pcells/ and add a line to load the new pcell code in $cdk_dir /skill/pcells/loadSkill.il. Update $cdk_dir /skill/pcells/redoPcells.il and $cdk_dir /doc/cdsuser/virtuoso.html to include the new pcell.
- Update $cdk_dir/techfile/devices.tf to do the layerAvailable code for the new layer (don't forget to add the new variable to the let). Add the code for any new symbolic device necessary, and add the new symbolic name to symList at the top of $cdk_dir/skill/menus/ciw/createLib.il.
- Update $cdk_dir/techfile/layerDefinitions.tf to do the layerAvailable code for the new layer (don't forget to add the new variable to the let). Add the new layer to techLayers(). Add the code to load the new layerDefn* file. Add the new layer characteristics to techDisplays(). Add the parasitic info for the new process if necessary.
- Create a new $cdk_dir/techfile/layerDefn.* file containing the valid layers for the new process, if you haven't already.
- Update $cdk_dir/techfile/divaDRC.rul to add the new layerAvailable variable to the let. Add DRC rules as necessary.
- Update $cdk_dir/techfile/divaEXT.rul to add the new layerAvailable variable to the let. Add whatever layer-dependent code is necessary.
- Update $cdk_dir/techfile/divaLayerDef.il to do the layerAvailable code for the new layer (don't forget to add the new variable to the let). Add any necessary derived layer definitions. Add a new geomConnect case, if necessary. Add dubiousData, geomGetNon45 and offGrid checks for the new layer. Do the edge derived layer for the new layer.
- Update $cdk_dir/techfile/divaMultiLevel.il to do whatever extraction you need on the new layer.
- Update $cdk_dir/techfile/layerRules.tf to do the layerAvailable code for the new layer (don't forget to add the new variable to the let). Add the new layer to the streamLayers() class (required) and to the viaLayers() class (if necessary).
- Update $cdk_dir/techfile/physicalDesignAppRules.tf to do the layerAvailable code for the new layer (don't forget to add the new variable to the let). Add the new layer to dleExtractLayers() and dlrRoutingLayers if necessary.
- Update $cdk_dir/techfile/physicalRules.tf to do the layerAvailable code for the new layer (don't forget to add the new variable to the let). Add the new layer rules to orderedSpacingRules and spacingRules if necessary.
--Slipa 12:20, 27 February 2006 (EST)