LVS

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LVS

LVS is the process by which an extracted layout and a schematic are compared to see if they are topologically equivalent, i.e., their netlists match. (It can also be used to compare two schematics or two layouts.) LVS options can be changed for a given library via the "NCSU->Modify LVS Rules..." menu. This overwrites the link to the site divaLVS.rul file in the library's directory with the appropriate rules.

The following options are available to set the LVS rules. For the most part they're self-explanatory:

  • Allow FET Series Permutation: disregard the connection order of series-connected FETs. Eg, in a NAND gate's pulldown stack this would allow the "a" and "b" inputs to be connected to either NMOS.
  • Combine Parallel FETs: reduce parallel-connected FETs into one equivalent FET
  • Combine Parallel Resistors: reduce parallel-connected resistors into one equivalent resistor
  • Combine Series Resistors: reduce series-connected resistors into one equivalent resistor
  • Combine Parallel Capacitors: reduce parallel-connected capacitors into one equivalent capacitor
  • Combine Series Capacitors: reduce series-connected capacitors into one equivalent capacitor
  • Compare FET Parameters: generate warning if FET widths and lengths don't match
  • Ignore FET Body Terminal: ignore FET body terminal (usefulfor preliminary verification)
  • Compare Capacitor Parameters: generate warning if capacitor values don't match. The amount by which the values can differ before they are considered mismatched is defined by the global variable NCSU_LVSCapSlack. A value of 0 indicates perfect agreement is required. The default is 0.1 (values must match within 10%).
  • Compare Resistor Parameters: generate warning if resistor values don't match. The amount by which the values can differ before they are considered mismatched is defined by the global variable NCSU_LVSResSlack. A value of 0 indicates perfect agreement is required. The default is 0.1 (values must match within 10%).

Note that if users change the value of either NCSU_LVSCapSlack or NCSU_LVSResSlack, they must rerun the "NCSU->Modify LVS Rules..." menu to make the change take effect in the rules file.

Note: The Diva DRC and extraction rules are derived in large part from rules written at MIT by Jeff Gealow and Jen Lloyd.

--Slipa 12:08, 27 February 2006 (EST)